This application is related to Japanese application No. 2000-375582 filed on Dec. 11, 2000, whose priority is claimed under 35 USC xc2xa7119, the disclosure of which is incorporated by reference in its entirety.
1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same. In particular it relates to a semiconductor device in which a silicide film is formed on the surfaces of a gate electrode and a source/drain region, and a method of manufacturing the same.
2. Description of Related Art
In accordance with the progress in integration of MOS semiconductor devices, the size of a MOSFET (MOS field effect transistor) to be formed on a substrate has been miniaturized. When the MOSFET is miniaturized in a submicron order, parasitic resistances of a gate electrode and a source/drain of the MOSFET hinder high-speed processing of the MOS integrated circuit. To reduce such parasitic resistances, there has been developed a method of vapor-depositing a refractory metal and heating it to form a low resistive metal silicide on the gate electrode and the source/drain region in a self-alignment manner (Salicide technique). According to the technique, sheet resistance of a diffusion layer can be reduced from a conventional value of 50 to 100 xcexa9/xe2x96xa1 to 2 to 3 xcexa9/xe2x96xa1, which is one or more-digit smaller than the conventional value. Accordingly, influence exerted on an operation capability of the device can be ignored. As a metal material for forming the silicide, Ti has been proposed because of its property of silicide formation and low resistivity. Titanium silicide has already been practically utilized in processors and the like.
Hereinafter, description is made with reference to FIGS. 4(a) to 4(b) to a part of a process of manufacturing MOSFET by Salicide technique described in Japanese Unexamined Patent Publication No. Hei 6 (1994)-132243.
As shown in FIG. 4(a), a device isolation regions 22 are formed first on a surface of a semiconductor substrate 21. Boron ions are then implanted to a surface region of the semiconductor substrate 21 and activated by thermal treatment to form a P well 23.
Then, a gate insulating film 24 is formed by thermal oxidation and a polysilicon film containing no impurities is deposited on the entire surface by chemical vapor deposition (CVD). Then, the polysilicon film is patterned by photolithography and reactive ion etching (RIE) to form a gate electrode 25.
Thereafter, as shown in FIG. 4(b), a silicon oxide film is formed on the entire surface by CVD and the silicon oxide film is anisotropically etched using ions containing C and F to form sidewall films 26 on the sidewalls of the gate electrode 25. At the end of the etching, the surfaces of the gate electrode 25 and the semiconductor substrate 21 are exposed to plasma so that a layer 27 which is contaminated and/or damaged by fluorocarbon and/or SiC is formed. The contaminated and/or damaged layer 27 causes increase in resistance of a silicide layer 31 (see FIG. 4(d)).
Then, using the gate electrode 25 and the sidewall films 26 as a mask, boron difluoride ions are implanted and activated by thermal treatment in N2 atmosphere at 1000xc2x0 C. for about 10 seconds to form a source/drain region 29. At this time, the boron difluoride ions are also implanted in the gate electrode 25.
Next, as shown in FIG. 4(c), residual contaminants 30 on the gate electrode 25 which is not covered with the sidewall films 26 and on the source/drain region 29 are released by lamp heating in an inert gas. Then, a spontaneous oxide film is removed from the surfaces of the gate electrode 25 and the source/drain region 29 by Ar ion sputter etching. Accordingly, the silicon surfaces of the gate electrode 25 and the source/drain region 29 are exposed.
Thereafter, as shown in FIG. 4(d), a refractory metal film is vapor-deposited on the entire surface and heated to form a silicide film 31 on the gate electrode 25 and the source/drain region 29, respectively.
However, in the conventional techniques, the residual contaminants 30 on the surface of the silicon substrate are removed, but the layer contaminated by fluorocarbon and the damaged layer containing SiC cannot be removed from the surfaces of the gate electrode and the semiconductor substrate. This increases the sheet resistance of the silicide film, which may cause deterioration of transistor properties.
Then, to solve the above-mentioned problems, the invention provides a method of for forming a silicide capable of removing the contaminated and damaged layers.
According to the present invention, provided is a method of manufacturing a semiconductor device comprising the steps of: (a) forming a thermal oxide film on a surface of a silicon layer; (b) removing the thermal oxide film; and (c) forming a silicide film on the resulting surface of the silicon layer.
These and other objects of the present application will become more readily apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.